Search - PCI VHDL

[VHDL-FPGA-Verilog] PCI_144

Description: -- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library --- PCI Target Interface Design for XC73144---- Synopsys VHDL Solution using Xilinx XC7000 Library
Platform: | Size: 3072 | Author: processor | Hits:

[VHDL-FPGA-Verilog] PCIarbitration

Description: 这是PCI 仲裁机制的VHDL源码，它实现了PCI仲裁机制。-PCI arbitration mechanism VHDL source code, it achieved a PCI arbitration mechanism.
Platform: | Size: 3072 | Author: 赵云 | Hits:

[Other] PCI_Target_ip

Description: pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
Platform: | Size: 428032 | Author: zhouhong | Hits:

[ELanguage] usb_funct

Description: USB接口的VHDL源码，支持Verilog HDL程序-USB VHDL source code, supports Verilog HDL procedures
Platform: | Size: 230400 | Author: 王森 | Hits:

[Embeded-SCM Develop] fpgapci

Description: 用vhdl编写的pci源代码。花了我2000多元钱买来的，编译通过！-with vhdl pci prepared by the source code. I spent more than 2,000 yuan to buy and compile!
Platform: | Size: 3072 | Author: 王娟 | Hits:

[VHDL-FPGA-Verilog] PCI_VHDL

Description: 32位33M的PCI接口的VHDL实现，想深入学VHDL或实现PCI的可以看一看-32 of the PCI interface 33M realize VHDL, VHDL, or would like to realize in depth study could take a look at the PCI
Platform: | Size: 106496 | Author: 缪德芳 | Hits:

[VHDL-FPGA-Verilog] control_wrr

Description: 用VHDL语言实现的以09449为桥接芯片的PCI接口，很高兴与大家共享。-Using VHDL language in order to achieve the 09,449 for the bridge chip s PCI interface, I am very glad to share with you.
Platform: | Size: 3072 | Author: cws | Hits:

[VHDL-FPGA-Verilog] Pcit32vhdl

Description: PCI 32 target IP for Fpga/asic Designer
Platform: | Size: 428032 | Author: 李晓媛 | Hits:

[Driver Develop] pci_sample

Description: pci开发的好例子我找了很久，希望有帮助-pci to develop a good example of looking for a long time I hope that has helped
Platform: | Size: 32768 | Author: yaoyh | Hits:

[VHDL-FPGA-Verilog] pci_core

Description: pci CORES 从外国网站上弄下来的，大家可以看看啊-pci CORES from foreign web sites get down, we will look at ah
Platform: | Size: 28672 | Author: haitao | Hits:

[VHDL-FPGA-Verilog] pci_arbi_quicklogic

Description: pci总线仲裁ip，对学习者有很高的参考价值。-pci bus arbitration ip, on the learners have a high reference value.
Platform: | Size: 3072 | Author: 王廷龙 | Hits:

[VHDL-FPGA-Verilog] PCI_Arbit_VHD_CPLD

Description: PCI Arbitor by VHDL -PCI Arbitor by VHDL
Platform: | Size: 4096 | Author: Winsam Tung | Hits:

[VHDL-FPGA-Verilog] hgb_pci_host

Description: 内有一PCI 主和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。本PCI_HOST目前支持： 1、对目标PCI_T进行配置； 2、对目标进行单周期读写； 3、可以工作在33MHZ和66MHZ 4、支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的-There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of
Platform: | Size: 2712576 | Author: | Hits:

[VHDL-FPGA-Verilog] pcicard

Description: pci debug card 的VHDL源代码-pci debug card of the VHDL source code
Platform: | Size: 1024 | Author: wwww | Hits:

[VHDL-FPGA-Verilog] pci_core.tar

Description: vhdl 写的 PCI IP核程序，已经过测试-pci ip core
Platform: | Size: 23552 | Author: planet1997 | Hits:

[VHDL-FPGA-Verilog] PCI_VHDL

Description: pci控制器的vhdl代码-pci vhdl
Platform: | Size: 27648 | Author: 包云兵 | Hits:

[VHDL-FPGA-Verilog] PCI_arbi

Description: PCI arbi verilog source code
Platform: | Size: 3072 | Author: bulbul1225 | Hits:

[Embeded-SCM Develop] pcie_vera_tb_latest.tar

Description: FEATURES • 16 bit PIPE Spec PCI Express Testbench • Link training • Initial Flow Control • Packet Classes for easy to build PHY,DLLP and TLP packets • DLLP 16 bit CRC and TLP LCRC generation • Sequence Number generation and checking • ACK TLP packets • Scrambling • MemRd MemWr CfgRd CfgWr TLPs -FEATURES • 16 bit PIPE Spec PCI Express Testbench • Link training • Initial Flow Control • Packet Classes for easy to build PHY,DLLP and TLP packets • DLLP 16 bit CRC and TLP LCRC generation • Sequence Number generation and checking • ACK TLP packets • Scrambling • MemRd MemWr CfgRd CfgWr TLPs
Platform: | Size: 169984 | Author: Arun | Hits:

[VHDL-FPGA-Verilog] FPGA_8008

Description: pci pci转local bus总线的应用，使用IPcore alter器件-pci pci convert local bus application,use alter IP core
Platform: | Size: 493568 | Author: robincyh | Hits:

[Embeded-SCM Develop] PCI

Description: 采用9054做为板卡与计算机通信的媒介，ADSP21161作为运算器件的采集卡。该程序完成计算机通信。-Using 9054 as the board of the media and computer communications, ADSP21161 computing device as a capture card. Computer Communications completed the program.
Platform: | Size: 1502208 | Author: sh | Hits:

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[VHDL-FPGA-Verilog] PCI_144

[VHDL-FPGA-Verilog] PCIarbitration

[Other] PCI_Target_ip

[ELanguage] usb_funct

[Embeded-SCM Develop] fpgapci

[VHDL-FPGA-Verilog] PCI_VHDL

[VHDL-FPGA-Verilog] control_wrr

[VHDL-FPGA-Verilog] Pcit32vhdl

[Driver Develop] pci_sample

[VHDL-FPGA-Verilog] pci_core

[VHDL-FPGA-Verilog] pci_arbi_quicklogic

[VHDL-FPGA-Verilog] PCI_Arbit_VHD_CPLD

[VHDL-FPGA-Verilog] hgb_pci_host

[VHDL-FPGA-Verilog] pcicard

[VHDL-FPGA-Verilog] pci_core.tar

[VHDL-FPGA-Verilog] PCI_VHDL

[VHDL-FPGA-Verilog] PCI_arbi

[Embeded-SCM Develop] pcie_vera_tb_latest.tar

[VHDL-FPGA-Verilog] FPGA_8008

[Embeded-SCM Develop] PCI

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